6 - Interfacing Subsystems

2016-10-02 21:00:00 +0000, 2 years and 1 week ago

1 - Tri-state buffers

2 - Data latches

3 - Schmitt trigger circuits

4 - Signal conditioning with Schmitt triggers

5 - H-Bridge drives

H-bridge drivers allow current to be reversed through a device, we do this so that we can alter the direction of say, a motor.
You could reverse the direction mechanically via switches, but this not controlled by logic, and you also cannot stop the motor.

e.g.

          SPDT         SPDT
+Vs >-*---*\    /---\    /*---*-< -Vs
      |     *---+ M +---*     |
      |   *     \---/     *   |
      |   |               |   |
      |   +---------------+---+
      +-------------------+

When the switch is in the upper position the switches will spin one direction and in the down position they will spin in the opposite direction. However the battery can be short-circuited if on the the switches is in the higher position, and the other switch is in the lower position.

A circuit of H-Bridge is shown:

----+----+---------+----+----* +Vs
    |    |         |  s |
  /-+-\  |         |  /-+-\ P-Channel  
--+TR1|  ^ diodes  ^  |TR3+--
  \-+-/  |         |  \-+-/ g
    |    |A /---\B |    | d
    +----+--+ M +--+----+
    |    |  \---/  |    | d
  /-+-\  |         |  /-+-\ N-Channel
--+TR2|  ^ diodes  ^  |TR4+--
  \-+-/  |         |  \-+-/ g
    |    |         |  s |
----+----+---------+----+-----* 0V

TR1, TR3 are both P-Channel MOSFETs
TR2, TR4 are both N-Channel MOSFETs

Since the MOSFET’s are connected together at the drain and not the source, the MOSFET’s function as switches, and not source follower amplifiers.
The four diodes provide protection for the MOSFET’s from the large induced voltages produced by the motor.

To make side A of the motor positive and side B connected to 0V, TR1 and TR4 must conduct, therefore the gate of TR1 must be connected to 0V, and the gate of TR4 connected to +Vs.
To make side B of the motor positive and side A connected to 0V, TR2 and TR3 must conduct, therefore the gate of TR3 must be connected to 0V, and the gate of TR4 connected to +Vs.

If TR1 and TR3 or TR2 and TR4 conduct at the same time; there is a possibility that the MOSFET’s will be damaged since this would short circuit the power supply.

If TR1 and TR3 are conducting, but TR2 and TR4 are not, then the motor will not spin and vice versa.

You could drive a H-Bridge directly from a microcontroller; but it would be wise to add a logic system that does not allow short-circuiting to occur, thus protecting the MOSFET’s.

The following circuit does just that:

e.g.

*-------------------+----+---------+----+----* +Vs
stop/go             |    |         |  s |
-----+----+--\    /-+-\  |         |  /-+-\ P-Channel  
     |    |  +*-+-+TR1|  ^ diodes  ^  |TR3+-----*<-----+
     | +--+--/  | \-+-/  |         |  \-+-/ g   NOT    |
 NOT * |  NAND  |   |    |A /---\B |    | d            |
     ^ |        |   +----+--+ M +--+----+              |
     | |  AND   |   |    |  \---/  |    | d            |
     +-+--+--\  | /-+-\  |         |  /-+-\ N-Channel  |
       |  |  ++-+-+TR2|  ^ diodes  ^  |TR4+-----*<---+ |
-------+--+--/| | \-+-/  |         |  \-+-/ g   NOT  | |
clock/anti    | |   |    |         |  s |            | |
*-----------+-+-+---+----+---------+----+-----* 0V   | |
              +-+------------------------------------+ |
                |                                      |
                *--------------------------------------+

This logic system makes sure that in anyway the circuit is powered, there is no chance of short circuiting the supply. The truth table below shows how the logic system functions.
STOP = 0, GO = 1. CLOCKWISE = 0, ANTICW = 1.

stop/go clock/anti TR1 TR2 TR3 TR4
0 0 1 0 1 0
0 1 1 0 1 0
1 0 0 0 1 1
1 1 1 1 0 0


From the truth table, it can be seen that the gate of TR3 is logically inverse to TR2 and that TR4 is also logically inverse to TR1. It also shows that an AND gate is needed for TR2’s gate. A NAND gate can be used for the gate of TR1 if the clock/anti clock line is inverteed first, which is shown in the above diagram.

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